This invention relates to bus protocols. In particular, it is a method of and an apparatus for performing a check on an LPC (low pin count) bus protocol that is in the process of design or manufacture, but it can be used with other bus protocols.
A part of the design of a semiconductor chip is ensuring that a bus protocol is performing properly. This normally involves manually checking the protocol by following a sequence of steps to compare actual performance of the protocol with the desired performance. This is a time-consuming process that has many chances for errors. It would be helpful to have a way to check the protocol automatically. Such a process would also be of value in checking to see that production chips had properly functioning protocols.
A bus protocol is checked automatically during design or manufacture by monitoring signals applied to a bus and comparing the response to those signals with a predetermined desired response. A signal is generated to alert the protocol designer or manufacturing controller if there is an improper response that indicates that the protocol is in error. The invention is particularly useful as applied to check an LPC bus protocol.